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? semiconductor components industries, llc, 2017 march, 2017 ? rev. 0 1 publication order number: NCV51460/d NCV51460 20ma micropower precision voltage reference the NCV51460 is a high performance, low power precision voltage reference. this device combines very high accuracy, low power dissipation and small package size. it can supply output current up to 20 ma at a 3.3 v fixed output voltage with excellent line and load regulation characteristics making it ideal for precision regulator applications. it is designed to be stable with or without an output capacitor. the protective features include short circuit and reverse input voltage protection. the NCV51460 is packaged in a 3?lead surface mount sot?23 package. features ? fixed output voltage 3.3 v ? v out accuracy 1% over ?40 c to +125 c ? wide input voltage range up to 28 v ? low quiescent current ? low noise ? reverse input voltage protection ? stable without an output capacitor ? available in 3 leads sot?23 package ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec?q100 qualified and ppap capable ? these devices are pb?free, halogen free/bfr free and are rohs compliant typical applications ? precision regulators, high accuracy ? micropower supplies ? data acquisition systems ? instrument equipment ? cameras, camcorders, sensors NCV51460 gnd 3.3 v figure 1. typical application schematics v out v out v in (3.3 v fixed) c in 0.1 f v in = 4.2 to 28 v see detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. ordering information sot?23 sn1 suffix case 318 marking diagram and pin assignment www. onsemi.com 1 jjm jj = specific device code m = date code = pb?free package (note: microdot may be in either location) gnd v in v out 2 3 (top view)
NCV51460 www. onsemi.com 2 1 table 2. maximum ratings rating symbol value unit input voltage (note 1) v in 30 v reverse input voltage v in ?15 v output short circuit duration, t a = 25 c v in 27 v v in > 27 v t sc 50 sec operating ambient temperature range t a ?40 to 125 c maximum junction temperature t j(max) 150 c storage temperature range t stg ?65 to 150 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. refer to electrical characteristics and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec?q100?002 (eia/jesd22?a114) esd machine model tested per aec?q100?003 (eia/jesd22?a115) latch up current maximum rating: 150 ma per jedec standard: jesd78. table 3. thermal characteristics rating symbol value unit thermal characteristics, sot?23 package thermal resistance, junction?to?ambient (note 3) r ja 246 c/w 3. soldered on 1 oz 50 mm 2 fr4 copper area. table 4. recommended operating ranges rating symbol min max unit operating input voltage (note 4) v in v out + 0.9 28 v operating ambient temperature range t a ?40 125 c functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability. 4. refer to electrical characteristics and application information for safe operating area.
NCV51460 www. onsemi.com 3 table 5. electrical characteristics (v in = v out + 2.5 v, i out = 0, c in = 0.1 f, c out = 0 f; for typical values t a = 25 c, for min/max values ?40 c t a 125 c unless otherwise noted.) (note 5). parameter test conditions symbol min typ max unit output voltage v out 3.267 (?1%) 3.3 3.333 (+1%) v line regulation v in = v out + 0.9 v to v out + 2.5 v v in = v out + 2.5 v to v out + 20 v reg line ? ? 150 65 500 130 ppm/v load regulation i out = 0 to 100 a i out = 0 to 10 ma i out = 0 to 20 ma reg load ? ? ? 1100 150 120 4000 400 400 ppm/ma dropout voltage measured at v out ? 2% i out = 0 ma i out = 10 ma v do ? ? 0.65 0.9 0.9 1.4 v quiescent current i out = 0 ma, t a = 25 c i out = 0 ma, 0 c t a 100 c i q ? ? 140 200 220 a output short circuit current v out = 0 v, t a = 25 c i sc ? 80 ? ma reverse leakage v in = ? 15 v, t a = 25 c i leak ? 0.1 10 a output noise voltage (note 6) f = 0.1 hz to 10 hz f = 10 hz to 1 khz v n ? 12 18 ? v pp v rms output voltage temperature coefficient 0 c t a 100 c ?40 c t a 125 c t co ? ? 18 34 ? ? ppm/ c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 5. performance guaranteed over the indicated operating temperature range by design and/or characterization, tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. the noise spectral density from 0.1 hz to 10 hz is measured, then the integral output noise voltage in this range is calculat ed. finally the peak to peak noise is calculated as 5x integral output noise. typical characteristics figure 2. output voltage vs. temperature figure 3. output voltage vs. temperature t j , junction temperature ( c) v out , output voltage (v) i out = 0 ma c out = 0 f v in = v out + 20 v 3.267 3.272 3.277 3.282 3.287 3.292 3.297 3.302 3.307 3.312 3.317 3.322 3.327 3.332 ?40 ?20 0 20 40 60 80 100 120 140 v in = v out + 2.5 v v in = v out + 0.9 v 3.267 3.272 3.277 3.282 3.287 3.292 3.297 3.302 3.307 3.312 3.317 3.322 3.327 3.332 ?40 ?20 0 20 40 60 80 100 120 140 t j , junction temperature ( c) v out , output voltage (v) v in = v out + 2.5 v c out = 0 f i out = 0 ma i out = 10 ma i out = 20 ma
NCV51460 www. onsemi.com 4 typical characteristics figure 4. output voltage vs. temperature figure 5. dropout voltage t j , junction temperature ( c) t j , junction temperature ( c) figure 6. quiescent current figure 7. line regulation v in , input voltage (v) t j , junction temperature ( c) v out , output voltage (v) v drop , dropout voltage (v) i q , quiescent current ( a) reg line , line regulation (mv) 3.267 3.272 3.277 3.282 3.287 3.292 3.297 3.302 3.307 3.312 3.317 3.322 3.327 3.332 ?40 ?20 0 20 40 60 80 100 120 140 v in = 5.8 v i out = 0 ma c out = 0 f unit 1 unit 2 unit 3 three typical parts 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 ?40 ?20 0 20 40 60 80 100 120 140 i o = 0 ma i o = 1 ma i o = 5 ma i o = 10 ma i o = 20 ma 0 50 100 150 200 250 300 350 400 450 0 2 4 6 8 10 12 14 16 18 20 i out = 0 ma c out = 0 f t j = 25 c t j = ?25 c t j = 125 c 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 ?40 ?20 0 20 40 60 80 100 120 140 v in = 5.8 to 23.3 v i out = 0 ma c out = 0 f v in = 5.8 to 18.3 v v in = 5.8 to 15.3 v v in = 5.8 to 12.3 v v in = 5.8 to 9.3 v 12 10 8 6 4 2 0 ?40 ?20 0 20 40 60 80 100 120 140 reg load , load regulation (mv) figure 8. load regulation sourcing t j , junction temperature ( c) v in = 5.8 v c out = 0 f i out = 0 to 20 ma i out = 0 to 15 ma i out = 0 to 5 ma i out = 0 to 1 ma i out = 0 to 10 ma figure 9. load regulation sinking t j , junction temperature ( c) load reg , load regulation (mv) 0 20 40 60 80 100 120 140 160 ?40 ?20 0 20 40 60 80 100 120 140 i out = 0 ma down to ?2 ma i out = 0 ma down to ?1.50 ma i out = 0 ma down to ?1.2 ma i out = 0 a down to ?500 a v in = 5.8 v c out = 0 f c out = 0 f
NCV51460 www. onsemi.com 5 typical characteristics figure 10. short circuit current figure 11. power supply rejection ratio c out = 0 f t j , junction temperature ( c) f, frequency i sc , short circuit current (ma) 40 50 60 70 80 90 100 110 120 130 140 ?40 ?20 0 20 40 60 80 100 120 140 c out = 0 f v in = 28 v v in = 15 v v in = 5.8 v 0 10 20 30 40 50 60 70 80 10 100 1000 10k 100k 1 m i out = 1 ma i out = 0 ma i out = 20 ma v in = 5.8 vdc 50 mvac c out = 0 f t j = 25 c 0 10 20 30 40 50 60 70 80 10 100 1000 10k 100k 1m psrr, power supply rejection ratio (db) figure 12. power supply rejection ratio c out = 0.1 f f, frequency v in = 5.8 vdc 50 mvac c out = 0.1 f mlcc t j = 25 c i out = 1 ma i out = 0 ma i out = 20 ma 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 10k 100k 1 m i out = 1 ma i out = 20 ma i out = 0 ma v in = 5.8 vdc 50 mvac c out = 1 f mlcc t j = 25 c figure 13. power supply rejection ratio c out = 1 f f, frequency psrr, power supply rejection ratio (db) psrr, power supply rejection ratio (db ) 0 10 20 30 40 50 60 70 80 90 4 5 6 7 8 9 10 11 12 psrr, power supply rejection ratio (db) figure 14. power supply rejection ratio vs. input voltage v in , input voltage (v) i out = 10 ma, c out = 0 f, t a = 25 c f ripple = 100 hz f ripple = 10 khz f ripple = 100 khz f ripple = 1 mhz 0 10 20 30 40 50 60 70 80 4567891011 12 psrr, power supply rejection ratio (db) figure 15. power supply rejection ratio vs. input voltage v in , input voltage (v) f ripple = 100 hz f ripple = 10 khz f ripple = 100 khz f ripple = 1 mhz i out = 20 ma, c out = 0 f, t a = 25 c
NCV51460 www. onsemi.com 6 typical characteristics 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 0.1 1 10 figure 16. output voltage noise 0.1 hz ? 10 hz f, frequency (hz) v n , output noise ( v rms /rthz) v in = 5.8 v i out = 0 ma, c out = 0 f, t a = 25 c 0.1 hz ? 10 hz integral noise: v n = 2.28 v rms 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 10 100 1000 10k 100k 1m figure 17. output voltage noise 10 hz ? 1 mhz f, frequency (hz) v n , output noise ( v rms /rthz) v in = 5.8 v i out = 0 ma to 20 ma, c out = 0 f, t a = 25 c 10 hz ? 1 khz integral noise: v n = 18 v rms v n , output noise ( v rms /rthz) figure 18. output voltage noise 10 hz ? 1 mhz c out = 0.1 f f, frequency (hz) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 10 100 1000 10k 100k 1m i out = 1 ma i out = 0 ma i out = 10 ma i out = 20 ma v in = 5.8 v i out = 0 ma to 20 ma, c out = 0.1 f mlcc, t a = 25 c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 10 100 1000 10k 100k 1m v n , output noise ( v rms /rthz) figure 19. output voltage noise 10 hz ? 1 mhz c out = 1 f f, frequency (hz) i out = 1 ma i out = 0 ma i out = 10 ma i out = 20 ma v in = 5.8 v i out = 0 ma to 20 ma, c out = 1 f mlcc, t a = 25 c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 10 100 1000 10k 100k 1m v n , output noise ( v rms /rthz) figure 20. output voltage noise 10 hz ? 1 mhz c out = 10 f f, frequency (hz) i out = 10 ma i out = 20 ma i out = 1 ma i out = 0 ma v in = 5.8 v i out = 0 ma to 20 ma, c out = 10 f mlcc, t a = 25 c 3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.45 figure 21. load transient response 0 ? 10 ma time (20 s/div) v out , output voltage (50 mv/div) v in = 0 to 5.8 v, c out = 0 f, t rise_fall = 10 ma/1 s, t a = 25 c i out = 0 ma i out = 10 ma v out
NCV51460 www. onsemi.com 7 typical characteristics 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 figure 22. load transient response 0 ? 20 ma time (10 s/div) v out , output voltage (200 mv/div) v in = 5.8 v, c out = 0 f, t rise_fall = 20 ma/1 s, t a = 25 c i out = 0 ma i out = 20 ma v out 3.4 3.3 2.2 3.4 3.3 3.2 3.4 3.3 3.2 3.4 3.3 2.2 v out , output voltage (100 mv/div) figure 23. load transient responses c out = 0 ? 4.7 f time (50 s/div) c out = 0 f c out = 0.1 f mlcc c out = 1 f mlcc c out = 4.7 f mlcc v in = 5.8 v, t a = 25 c, t rise_fall = 10 ma/1 s v out v out v out v out i out = 10 ma i out = 0 ma 6 4 2 0 3 2 1 0 time (10 s/div) v out , output volt- age (1 v/div) v in , input voltage (2 v/div) v in = 0 v to 5.8 v, c in = 0 f, c out = 0 f, i out = 0 ma, t a = 25 c, t rise = 20 s figure 24. turn?on v out v in 0 1 2 3 4 0 2 6 time (50 s/div) v out , output volt- age (1 v/div) v in , input voltage (2 v/div) v in = 5.8 v to 0 v, c out = c in = 0 f, i out = 0 ma, t a = 25 c, t rise_fall = 25 s figure 25. turn?off v out v in
NCV51460 www. onsemi.com 8 applications information input decoupling capacitor (c in ) it is recommended to connect a 0.1 f ceramic capacitor between v in and gnd pin of the device. this capacitor will provide a low impedance path for unwanted ac signals or noise present on the input voltage. the input capacitor will also limit the influence of input trace inductances and power supply resistance during sudden load current changes. higher capacitances will improve the power supply rejection ratio and line transient response. output decoupling capacitor (c out ) the NCV51460 was designed to be stable without an additional output capacitor. without the output capacitor the v out settling times during reference t urn?on or turn?off can be as short as 20 s (refer to figure 24 and 25). the load transient responses without c out (figure 21 and 22) show good stability of NCV51460 even for fast output current changes from 0 ma to full load. if smaller v out deviations during load current changes are required, it is possible to add some external capacitance as shown on figure 26. NCV51460 gnd 3.3 v c in 0.1 f v in = 4.2 to 28 v v in v out v out c out (3.3 v fixed) figure 26. output capacitor connection the c out will reduce the overshoot and undershoot but will increase the settling time and can introduce some ringing of the output voltage during fast load transients. NCV51460 behavior for different values of ceramic x7r output capacitors is depicted on figure 23. the output voltage ringing and settling times can be reduced by using some additional resistance in series with the ceramic capacitor or by using tantalum or aluminum capacitors which have higher esr values. figure 27 below shows the load transient improvement after adding an additional 2 series resistor to a 1 f ceramics capacitor. 3.35 3.30 3.25 3.35 3.30 3.25 v out , output voltage (50 mv/div) figure 27. c out = 1 f mlcc + 2 v in = 5.8 v, t a = 25 c, t rise_fall = 10 ma/1 s v out i out = 10 ma i out = 0 ma c out = 1 f mlcc time (50 s/div) the device was determined to be stable with aluminum, ceramic and tantalum capacitors with capacitances ranging from 0 to 100 f at t a = 25 c. turn?on response it is possible to achieve very fast turn?on time when fast v in ramp is applied to NCV51460 input as shown on figure 24. however if the input voltage change from 0 v to nominal input voltage is extremely fast, the output voltage settling time will increase. figure 28 below shows this ef fect when the input voltage change is 5.8 v / 2 s. 0 1 2 3 0 2 4 6 time (10 s/div) v out , output volt- age (1 v/div) v in , input voltage (2 v/div) figure 28. v in = 0 v to 5.8 v, c in = 0 f, c out = 0 f, i out = 0 ma, t a = 25 c, t rise = 45 s v out v in
NCV51460 www. onsemi.com 9 a 0.1 f or larger input capacitor will help to decrease the dv/dt of the input voltage and improve stability during large load current changes. during the turn?on for certain conditions the output voltage can exhibit an overshoot. the amount of the overshoot strongly depends on application conditions i.e. input voltage level, slew rate, input and output capacitors, and output current. the maximum value of the overshoot isn?t guaranteed for this device. the figure below shows an example of the t urn?on overshoot. 0 1 2 3 0 2 4 6 v out , output volt- age (1 v/div) v in , input voltage (2 v/div) time (10 s/div) figure 29. v in = 0 v to 6 v, c out = 0 f, i out = 1 ma, t a = 25 c, t rise = 30 s turn?off response the turn?off response time is directly proportional to the output capacitor value and inversely proportional to the load value. the NCV51460 device does not have any dedicated internal circuitry to discharge the output capacitor when the input voltage is turned?off or disconnected. this is why when lar ge output capacitors are used and very small output current is drawn, it can take a considerable amount of time to discharge the capacitor. if short turn?off times are required, the output capacitor value should be minimized i.e. with no output capacitor a 20 s turn?off time can be achieved. protection features the NCV51460 device is equipped with reverse input voltage protection which will help to protect the device when input voltage polarity is reversed. in this circumstance the input current will be minimized to typically less than 0.1 a. the short circuit protection will protect the device under the condition that the v out is suddenly shorted to ground. the short circuit protection will work properly up to an input voltage of 27 v at t a = 25 c. depending on the pcb trace width and thickness, air flow and process spread this value can be slightly different and should be confirmed in the end application. no external voltage source should be connected directly to the v out pin of NCV51460 regulator. if the external source forces the output voltage to be greater than the nominal output voltage level, the current will start to flow from the voltage source to the v out pin. this current will increase with the output voltage applied and can cause damage to the device if v out > 10 v typ. at 25 c (figure 30). 0 4 8 12 16 20 24 34567891 0 i o , current into v out pin (ma) v out , output voltage (v) figure 30. c out = 0 f, t a = 25 c output noise the NCV51460 output voltage noise strongly depends on the output capacitor value and load value. this is caused by the fact that the bandwidth of the reference is inversely proportional to the capacitor value and directly proportional to the output current. the reference bandwidth directly determines the point where the output voltage noise starts to fall. this can be observed at the figure 31 below. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 10 100 1000 10k 100k 1m v n , output voltage noise ( v rms /rthz) f, frequency (hz) figure 31. c out = 0.1 f v in = 5.8 v i out = 0 ma, c out = 0 ? 10 f mlcc, t a = 25 c c out = 0 f c out = 1.0 f c out = 10 f
NCV51460 www. onsemi.com 10 the peaks which are visible on the noise spectrum are reflecting the stability of the NCV51460 device. in the comparison in figure 31 it can be noticed that 0 f and 10 f cases represents the best stability. thermal characteristics as power dissipation in the NCV51460 increases, it may become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. the board material and the ambient temperature affect the rate of junction temperature rise for the part. the maximum power dissipation the NCV51460 can handle is given by: p d(max) [t j(max) t a ] r ja (eq. 1) since t j is not recommended to exceed 100 c (t j(max) ), then the NCV51460 can dissipate up to 305 mw when the ambient temperature (t a ) is 25 c. the power dissipated by the NCV51460 can be calculated from the following equations: p d v in (i q @i out ) i out (v in v out ) (eq. 2) or v in(max) p d(max) (v out i out ) i out i q (eq. 3) pcb layout recommendations v in and gnd printed circuit board traces should be as wide as possible. when the impedance of these traces is high, there is a chance to pick up noise and cause the regulator to malfunction. place external components, especially the output capacitor, as close as possible to the NCV51460, and make traces as short as possible. ordering information device marking package shipping ? NCV51460sn33t1g jj sot?23 (pb?free) 3,000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d.
NCV51460 www. onsemi.com 11 package dimensions sot?23 (to?236) case 318?08 issue ap d a1 3 12 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e do not include mold flash, protrusions, or gate burrs. mm inches
scale 10:1 0.8 0.031 0.9 0.035 0.95 0.037 0.95 0.037 2.0 0.079 view c l 0.25 l1 e e e b a see view c dim a min nom max min millimeters 0.89 1.00 1.11 0.035 inches a1 0.01 0.06 0.10 0.001 b 0.37 0.44 0.50 0.015 c 0.09 0.13 0.18 0.003 d 2.80 2.90 3.04 0.110 e 1.20 1.30 1.40 0.047 e 1.78 1.90 2.04 0.070 l 0.10 0.20 0.30 0.004 0.040 0.044 0.002 0.004 0.018 0.020 0.005 0.007 0.114 0.120 0.051 0.055 0.075 0.081 0.008 0.012 nom max l1 h 2.10 2.40 2.64 0.083 0.094 0.104 h e 0.35 0.54 0.69 0.014 0.021 0.029 c 0 ??? 10 0 ??? 10 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 NCV51460/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?

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